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NXP Semiconductors /MIMXRT1021 /DMA0 /TCD3_DLASTSGA

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Interpret as TCD3_DLASTSGA

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DLASTSGA

Description

TCD Last Destination Address Adjustment/Scatter Gather Address

Fields

DLASTSGA

Destination last address adjustment, or next memory address TCD for channel (scatter/gather)

Links

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Register License

Copyright 2016-2020 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data